1. Field of the Invention
The present invention relates to an IC (Integrated Circuit) testing apparatus which is used to measure the execution time of self a function which is executed automatically and independently by IC chip to be tested.
This application is based on patent application No. Hei 09-172502 filed in Japan, the content of which is incorporated herein by reference.
2. Description of Related Art
A memory IC with an automatic function is increasing in popularity, in particular, flash memory ICs with an automatic program function or an automatic erase function. These automatic functions generally take a long time to execute, (as long as 30 seconds, for example), and the execution time for each IC is different.
The test for the automatic function mentioned above also takes a long time and, at the same time, increases the cost for the test. Also, the user sometimes must select the ICs depending on the execution time of the automatic function, in order to avoid the long testing time.
There is a problem in that the conventional IC testing apparatus cannot measure the execution time of the automatic function, even though some testing apparatuses can stop the test halfway when all the DUTS (Device Under Test) which are simultaneously tested have passed the test before the predefined maximum testing time. The stop halfway is possible because of providing an evaluation circuit for the automatic function with minimum execution time, which has a different time for each DUT.
Device selection based on the execution time of the automatic function requires a very long time to calculate the time to the transition point using a judging result for every cycle which is stored in the memory. A conventional IC testing apparatus cannot make an automatic device selection based on the execution time of an automatic function because a circuit which measures the execution time of an automatic function of the DUT is not provided.